VDA VLSI Design Automation Lab

Department of electronics engineering,
National Chiao Tung University, Taiwan
Home > Publication > ACM-IEEE-Journal

Category Year Conference Name Title Author Acceptance Rate
ACM-IEEE-Journal 2015 TCAD A Fast Prototyping Framework for Analog Layout Migration with Planar Preservation P.-C. Pan, C.-Y. Chin, H.-M. Chen, T.-C. Chen, C.-C. Lee and J.-C. Lee
ACM-IEEE-Journal 2014 TODAES Clock Tree Synthesis Considering Slew Effect on Supply Voltage Variation C.-K. Wang, Y.-C. Chang, H.-M. Chen and C.-Y. Chin
ACM-IEEE-Journal 2014 TCAD ACER: An Agglomerative Clustering Based Electrode Addressing and Routing Algorithm for Pin-Constrained EWOD Chips Sean S.-Y. Liu, C.-H. Chang, H.-M. Chen and T.-Y. Ho
ACM-IEEE-Journal 2013 TVLSI Fast Thermal Aware Placement With Accurate Thermal Analysis Based on Green Function Sean S.-Y. Liu, R.-G. Luo, S. Aroonsantidecha, C.-Y. Chin and H.-M. Chen
ACM-IEEE-Journal 2013 TODAES A study of row-based area-array I/O design planning in concurrent chip-package design flow R.-J. Lee, H.-M. Chen
ACM-IEEE-Journal 2013 TODAES Agglomerative-Based Flip-Flop Merging and Relocation for Signal Wirelength and Clock Tree Optimization Sean S.-Y. Liu, W.-T. Lo, C.-J. Lee, H.-M. Chen
ACM-IEEE-Journal 2013 TCAD On Routing Fixed Escaped Boundary Pins for High Speed Boards C.-Y. Chin, C.-Y. Kuan, T.-Y. Tsai. H.-M. Chen and Yoji Kajitani
ACM-IEEE-Journal 2013 TVLSI Board and Chip Aware Package Wire Planning R.-J Lee, H.-W. Hsu and H.-M. Chen
ACM-IEEE-Journal 2010 TODAES Performance-Constrained Voltage Assignment in Multiple Supply Voltage SoC Floorplanning M.-C. Wu, M.-C. Lu, H.-M. Chen, and J.-Y. Jou
ACM-IEEE-Journal 2010 TVLSI Efficient Package Pin-Out Planning with System Interconnects Optimization for Package-Board Codesign R.-J. Lee and H.-M. Chen
ACM-IEEE-Journal 2009 TVLSI On Reducing Test Power and Test Volume by Effective Pattern Compression Schemes C.-Y. Lin, H.-C. Lin, and H.-M. Chen
ACM-IEEE-Journal 2008 TODAES Effective Decap Insertion in Area-Array SoC Floorplan Design C.-H. Lu, H.-M. Chen, and C.-N. Liu
ACM-IEEE-Journal 2008 TVLSI Design Migration from Peripheral ASIC Design to Area-IO Flip-Chip Design by Chip I/O Planning and Legalization Chia-Yi Chang and H.-M. Chen
ACM-IEEE-Journal 2007 TVLSI Fast Flip-Chip Pin-Out Designation Respin for Package-Board Codesign R.-J. Lee and H.-M. Chen
ACM-IEEE-Journal 2006 TCAD I/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design H.-M. Chen, I-M. Liu, and D.F. Wong
ACM-IEEE-Journal 2005 TCAD Simultaneous Power Supply Planning and Noise Avoidance in Floorplan Design H.-M. Chen, L.-D. Huang, I-M. Liu, and D.F. Wong