VDA VLSI Design Automation Lab

Department of electronics engineering,
National Chiao Tung University, Taiwan
Home> Project

Project NameFunding SourceStarting DataEnding Date
Electronic Design Automation for 3D Integration–Main Project and Subproject 4: 3D-SIC and 3D-SIP Design PlanningNSC (國科會)August 2009July 2011
A Novel Methodology in Chip-Package-Board Co-design and Co-optimizationNSC (國科會)August 2008July 2011
On Increasing Design Reliability in Advanced Manufacturing Technology–Main Project and Subpro- ject 3: Yield Improvement Methodologies in Post-Layout Design Flow and Design for TestNSC (國科會)August 2006July 2009
Core Technology for e-Home Environment–Subproject 6: Power Supply Planning and Noise Avoidance in SoC Floorplan DesignNSC (國科會)August 2004July 2007
Design and Automation for Low-Power Systems–Subproject 7: Floorplanning with Aggressive Power OptimizationNSC (國科會)November 2003July 2006
ITRI 3D-IC Power ITRI (工研院)August 2011July 2013
NSC Parallel placementNSC (國科會)August 2011July 2013

Gantt Chatt For List of Project
Home> Project

Project NameFunding SourceStarting DataEnding Date
Electronic Design Automation for 3D Integration–Main Project and Subproject 4: 3D-SIC and 3D-SIP Design PlanningNSC (國科會)August 2009July 2011
A Novel Methodology in Chip-Package-Board Co-design and Co-optimizationNSC (國科會)August 2008July 2011
On Increasing Design Reliability in Advanced Manufacturing Technology–Main Project and Subpro- ject 3: Yield Improvement Methodologies in Post-Layout Design Flow and Design for TestNSC (國科會)August 2006July 2009
Core Technology for e-Home Environment–Subproject 6: Power Supply Planning and Noise Avoidance in SoC Floorplan DesignNSC (國科會)August 2004July 2007
Design and Automation for Low-Power Systems–Subproject 7: Floorplanning with Aggressive Power OptimizationNSC (國科會)November 2003July 2006
ITRI 3D-IC Power ITRI (工研院)August 2011July 2013
NSC Parallel placementNSC (國科會)August 2011July 2013

Gantt Chatt For List of Project