VDA VLSI Design Automation Lab

Department of electronics engineering,
National Chiao Tung University, Taiwan
Home > Member > Master > Shuang-Yi Tan

Basic Information

Pic Degree Gender Entry Year Name English Name
Sytan Master M 2003 譚雙議 Shuang-Yi Tan
Email Occupation
Sy_tan@phison.com 瑞昱科技
Thesis
Improved Clustered Voltage Scaling for Low Power Cell-Based Design


Publication

Category Year Conference Name Title Author
Other-Conference 2006 SASIMI Improved Clustered Voltage Scaling Technique via Better Power-Timing Slack Sensitivity Strategy S.-Y. Tan and H.-M. Chen