VDA VLSI Design Automation Lab

Department of electronics engineering,
National Chiao Tung University, Taiwan
Home > Member > PhD > Chun-Kai, Wang

Basic Information

Pic Degree Gender Entry Year Name English Name
Oldkai PhD M 2007 王俊凱 Chun-Kai, Wang
Email Occupation
oldkai.ee90@gmail.com -


Category Year Conference Name Title Author
ACM-IEEE-Conference 2015 ISPD Closing the Gap between Global and Detailed Placement: Techniques for Improving Routability C.-K. Wang, C.-C. Huang, Sean S.-Y. Liu, C.-Y. Chin, S.-T. Hu, W.-C. Wu and H.-M. Chen
ACM-IEEE-Journal 2014 TODAES Clock Tree Synthesis Considering Slew Effect on Supply Voltage Variation C.-K. Wang, Y.-C. Chang, H.-M. Chen and C.-Y. Chin
ACM-IEEE-Conference 2012 ISPD On Constructing Low Power and Robust Clock Tree via Slew Budgeting (Accepted as Regular Paper) Y.-C. Chang, C.-K. Wang and H.-M. Chen

Honorable Mention

Year Title Content
2014 ISPD Contest 2014

[賀] VDAPlace 榮獲 2014 ISPD Contest第一名

2014 CAD Contest 2014

恭賀 胡盛德 王俊凱同學獲得 2014 Cad Contest 馬拉松組 第三名

2014 CADATHLON 2014

胡盛德 王俊凱 榮獲2014 Cadathlon 國際賽第一名

2014 CAD Contest 2014

賀 VDA-TP 榮獲 CAD Contest 定題組第二名!

2012 CAD Contest 2012

恭賀王俊凱,秦敬雨同學獲得 2012 Cad Contest 馬拉松組 第四名

2012 ICCAD Cadathlon

恭賀王俊凱,秦敬雨同學獲得 2012 ICCAD Cadathlon 第二名

Responsible Course TA

Date Course Name Designed Labs Grad/Under
2011 DataStructure Designed Labs