VDA VLSI Design Automation Lab

Department of electronics engineering,
National Chiao Tung University, Taiwan
Home > Member > Master > Ming-Ching Lu

Basic Information

Pic Degree Gender Entry Year Name English Name
Jackou Master M 2003 呂敏菁 Ming-Ching Lu
Email Occupation
benjamin_lu@springsoft.com 瑞昱科技
Floorplanning/Placement Methodology Considering Performance Constraints and Voltage Islands Generation


Category Year Conference Name Title Author
ACM-IEEE-Conference 2006 SOCC Performance Constraints Aware Voltage Island Generation in SoC Floorplan Design M.-C. Lu, M.-C. Wu, H.-M. Chen, and H.-R. Jiang