VDA VLSI Design Automation Lab

Department of electronics engineering,
National Chiao Tung University, Taiwan

All Announcements

Congratulations to Chen Chen of winning the Fourth Place of ISPD 2017 Contest : Clock-Aware FPGA Placement

ISPD 2017 Contest : Clock-Aware FPGA Placement

Ranking Team Affilication
1st UTPlaceF2.0 University of Austin Texas
2nd NTUfplace National Taiwan University
3rd RippleFPGA Chinese University of Hong Kong
4th VDAPlacer National Chiao Tung University
5th GPlace University of Guelph, Canada

2017-10-16 00:11:32 UTC

Congratulations to 胡盛德 王俊凱 for winning the First Place of CADathlon 2014 Contest

[賀] 胡盛德 王俊凱 榮獲2014 Cadathlon 國際賽第一名
賀 !

胡盛德 王俊凱 榮獲2014 Cadathlon 國際賽第一名

First Place : Sheng-Te Hu and Chung-Kai Wang (NCTU)
Second Place: Haitong Tian and Tsung-Wei Huang (UIUC)

2017-10-16 00:10:42 UTC

Congratulations to VDA-TP of winning Second Place of CAD Contest

[賀] VDA-TP 榮獲 CAD Contest 第二名
First Place :
Jucemar Monteiro, Guilherme Flach, Julia Casarin Puget & Mateus Paiva Fogaca
Universidade Federal do Rio Grande do Sul

Second Place:
Wei-Chen Wu, Sheng-Te Hu, Chun-Kai Wang, Wan-Ning Wu, Shih-Ying Liu & Prof. Hung-Ming Chen
National Chiao Tung University

Third Place:
Ka-Chun Lam, Wing-Kai Chow, Jian Kuang, Wenzan Kai, Zhiqing Liu and Prof. Evangeline F. Y. Young
City Univeristy of Hong Kong

Final Result

2017-10-16 00:09:19 UTC

[賀] 黃家麒、廖偉勛、盧冠睿 榮獲2014 Synopsys APP Contest 優等


黃家麒、廖偉勛、盧冠睿與工研院合作以 Power Delivery Network Synthesis, Analysis and Optimization 獲得 2014 Synopsys APP Desgin Contest 優等獎

2014-10-07 03:26:04 UTC

[賀] 王俊凱, 胡盛德 林柔君, 陳玟欣 晉級2014年CADathlon國際賽

恭賀 王俊凱 胡盛德 獲得CADathlon國內初選第三名 林柔君, 陳玟欣 獲得CADathlon國內初選第五名


1. 楊明仁, 王立為 (指導教授: 台大電子所 黃鐘揚)
2. 郭玧質, 李東原 (指導教授: 中央電子所 陳泰蓁)
3. 胡盛德, 王俊凱 (指導教授: 交大電子所 陳宏明)
4. 林世豐 (指導教授: 交大電子所趙家佐)
5. 林柔君, 陳玟欣 (指導教授: 交大電子所陳宏明)

2014-10-07 03:25:49 UTC